1. Field of the Invention
The present invention provides a power gating circuit of a signal processing system, and more particularly, a power gating circuit capable of changing a voltage level of output signal according to a voltage level of a control signal.
2. Description of the Prior Art
With the great developments of integrated circuits, semiconductor cell size has diminished to a deep submicron level, which can reduce the production cost of a chip and enhance operation speed and performance. However, as cell size reduces, there are other problems. Compared to past processes, a transistor manufactured by the deep submicron process includes high sub-threshold leakage current. Such problem is not really critical in only one cell, but in a very large scale integrated (VLSI) circuit having a lot of transistors, leakage current from each transistor will be accumulated to a degree that deteriorates the performance of the VLSI circuit. Furthermore, in an idle mode, the VLSI circuit should not generate direct current because no switching operation occurs. However, the accumulated leakage current may make the VLSI circuit unable to operate in the idle mode.
In order to improve leakage current, the prior art, such as a process of operating a deep-submicron metal oxide semiconductor field effect transistor, uses a technology of power gating to shut down unused circuit elements or blocks, so as to reduce leakage current. However, the power gating method may need to provide a set of high-level gate voltages for PMOS power switch, which are generated by an extra circuit and may cause reliability issues in power switches.